LAN9312 datasheet(238/458 Pages) SMSC

238 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Revision 1.2 (04-08-08)

238

SMSC LAN9312

DATASHEET

14.2.6.6

Switch Fabric MAC Address High Register (SWITCH_MAC_ADDRH)

This register contains the upper 16-bits of the MAC address used by the switch for Pause frames. This

re gist er is used in conjunct i on with Sw it ch Fabric MAC Address Low Register

(SWITCH_MAC_ADDRL). The contents of this register are optionally loaded from the EEPROM at

power-on through the EEPROM Loader if a programmed EEPROM is detected. The least significant

byte of this register (bits [7:0]) is loaded from address 05h of the EEPROM. The second byte (bits

[15:8]) is loaded from address 06h of the EEPROM. These EEPROM values are also loaded into the

Host MAC Address High Register (HMAC_ADDRH). The Host can update the contents of this field

after the initialization process has completed.

Refer to Section 9.6, "Host MAC Address," on page 119 for details on how the EEPROM Loader loads

this register. Section 10.2.4, "EEPROM Loader," on page 149 contains additional details on using the

EEPROM Loader.

Offset:

1F0h

Size:

32 bits

BITS

DESCRIPTION

TYPE

DEFAULT

31:16

RESERVED

15:0

Physical Address[47:32]

This field contains the upper 16-bits (47:32) of the physical address of the

Switch Fabric MACs.

R/W

FFFFh

LAN9312 Datasheet(PDF) 238 Page - SMSC Corporation