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LAN9312 Datasheet(PDF) 247 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 247 Page - SMSC Corporation |
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247 / 458 page  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet SMSC LAN9312 247 Revision 1.2 (04-08-08) DATASHEET Note 14.16 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on a DWORD boundary. When accessed serially (through the MII management protocol), the register is 16-bits wide. 7 Collision Test (VPHY_COL_TEST) This bit enables/disables the collision test mode. When set, the collision signal to the Host MAC is active during transmission from the Host MAC. Note: It is recommended that this bit be used only when in loopback mode. 0: Collision test mode disabled 1: Collision test mode enabled R/W 0b 6 Speed Select MSB (VPHY_SPEED_SEL_MSB) This bit is not used by the Virtual PHY and has no effect. The value returned is always 0. RO 0b 5:0 RESERVED RO - BITS DESCRIPTION TYPE DEFAULT |
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