LAN9312 datasheet(251/458 Pages) SMSC

251 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9312

251

Revision 1.2 (04-08-08)

DATASHEET

14.2.8.4

Virtual PHY Identification LSB Register (VPHY_ID_LSB)

This read/write register contains the LSB of the Virtual PHY Organizationally Unique Identifier (OUI).

The MSB of the Virtual PHY OUI is contained in the Virtual PHY Identification MSB Register

(VPHY_ID_MSB).

Note 14.25

The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on

a DWORD boundary. When accessed serially (through the MII management protocol), the

Note 14.26

IEEE allows a value of zero in each of the 32-bits of the PHY Identifier.

Offset:

Index (decimal):

1CCh

Size:

32 bits

BITS

DESCRIPTION

TYPE

DEFAULT

31:16

RESERVED

(See Note 14.25)

15:10

PHY ID

This field contains the lower 6-bits of the Virtual PHY OUI (Note 14.26).

R/W

00h

9:4

Model Number

This field contains the 6-bit manufacturer’s model number of the Virtual PHY

(Note 14.26).

R/W

00h

3:0

Revision Number

This field contain the 4-bit manufacturer’s revision number of the Virtual PHY

(Note 14.26).

R/W

LAN9312 Datasheet(PDF) 251 Page - SMSC Corporation

LAN9312 Datasheet(HTML) 251 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL