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LAN9312 Datasheet(PDF) 252 Page - SMSC Corporation

Part # LAN9312
Description  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
PDF  458 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9312 Datasheet(HTML) 252 Page - SMSC Corporation

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.2 (04-08-08)
252
SMSC LAN9312
DATASHEET
14.2.8.5
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
This read/write register contains the advertised ability of the Virtual PHY and is used in the Auto-
Negotiation process with the link partner.
Note:
This register is re-written in its entirety by the EEPROM Loader following the release or reset
or a RELOAD command. Refer to Section 10.2.4, "EEPROM Loader," on page 149 for more
information.
Offset:
Index (decimal):
1D0h
4
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:16
RESERVED
(See Note 14.27)
RO
-
15
Next Page
This bit determines the advertised next page capability and is always 0.
0: Virtual PHY does not advertise next page capability
1: Virtual PHY advertises next page capability
RO
0b
Note 14.28
14
RESERVED
RO
-
13
Remote Fault
This bit is not used since there is no physical link partner.
RO
0b
Note 14.29
12
RESERVED
RO
-
11
Asymmetric Pause
This bit determines the advertised asymmetric pause capability.
0: No Asymmetric PAUSE toward link partner advertised
1: Asymmetric PAUSE toward link partner advertised
R/W
0b
10
Pause
This bit determines the advertised symmetric pause capability.
0: No Symmetric PAUSE toward link partner advertised
1: Symmetric PAUSE toward link partner advertised
R/W
Note 14.30
9
100BASE-T4
This bit determines the advertised 100BASE-T4 capability and is always 0.
0: 100BASE-T4 ability not advertised
1: 100BASE-T4 ability advertised
RO
0b
Note 14.31
8
100BASE-X Full Duplex
This bit determines the advertised 100BASE-X full duplex capability.
0: 100BASE-X full duplex ability not advertised
1: 100BASE-X full duplex ability advertised
R/W
1b
7
100BASE-X Half Duplex
This bit determines the advertised 100BASE-X half duplex capability.
0: 100BASE-X half duplex ability not advertised
1: 100BASE-X half duplex ability advertised
R/W
1b
6
10BASE-T Full Duplex
This bit determines the advertised 10BASE-T full duplex capability.
0: 10BASE-T full duplex ability not advertised
1: 10BASE-T full duplex ability advertised
R/W
1b



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