LAN9312 datasheet(311/458 Pages) SMSC

311 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9312

311

Revision 1.2 (04-08-08)

DATASHEET

0812h

MAC_RX_65_TO_127_CNT_1

Port 1 MAC Receive 65 to 127 Byte Count Register,

Section 14.5.2.5

0813h

MAC_RX_128_TO_255_CNT_1

Port 1 MAC Receive 128 to 255 Byte Count Register,

Section 14.5.2.6

0814h

MAC_RX_256_TO_511_CNT_1

Port 1 MAC Receive 256 to 511 Byte Count Register,

Section 14.5.2.7

0815h

MAC_RX_512_TO_1023_CNT_1

Port 1 MAC Receive 512 to 1023 Byte Count Register,

Section 14.5.2.8

0816h

MAC_RX_1024_TO_MAX_CNT_1

Port 1 MAC Receive 1024 to Max Byte Count Register,

Section 14.5.2.9

0817h

MAC_RX_OVRSZE_CNT_1

Port 1 MAC Receive Oversize Count Register,

Section 14.5.2.10

0818h

MAC_RX_PKTOK_CNT_1

Port 1 MAC Receive OK Count Register, Section 14.5.2.11

0819h

MAC_RX_CRCERR_CNT_1

Port 1 MAC Receive CRC Error Count Register,

Section 14.5.2.12

081Ah

MAC_RX_MULCST_CNT_1

Port 1 MAC Receive Multicast Count Register,

Section 14.5.2.13

081Bh

MAC_RX_BRDCST_CNT_1

Port 1 MAC Receive Broadcast Count Register,

Section 14.5.2.14

081Ch

MAC_RX_PAUSE_CNT_1

Port 1 MAC Receive Pause Frame Count Register,

Section 14.5.2.15

081Dh

MAC_RX_FRAG_CNT_1

Port 1 MAC Receive Fragment Error Count Register,

Section 14.5.2.16

081Eh

MAC_RX_JABB_CNT_1

Port 1 MAC Receive Jabber Error Count Register,

Section 14.5.2.17

081Fh

MAC_RX_ALIGN_CNT_1

Port 1 MAC Receive Alignment Error Count Register,

Section 14.5.2.18

0820h

MAC_RX_PKTLEN_CNT_1

Port 1 MAC Receive Packet Length Count Register,

Section 14.5.2.19

0821h

MAC_RX_GOODPKTLEN_CNT_1

Port 1 MAC Receive Good Packet Length Count Register,

Section 14.5.2.20

0822h

MAC_RX_SYMBL_CNT_1

Port 1 MAC Receive Symbol Error Count Register,

Section 14.5.2.21

0823h

MAC_RX_CTLFRM_CNT_1

Port 1 MAC Receive Control Frame Count Register,

Section 14.5.2.22

0824h-083Fh

RESERVED

Reserved for Future Use

0840h

MAC_TX_CFG_1

Port 1 MAC Transmit Configuration Register, Section 14.5.2.23

0841h

MAC_TX_FC_SETTINGS_1

Port 1 MAC Transmit Flow Control Settings Register,

Section 14.5.2.24

0842h-0850h

RESERVED

Reserved for Future Use

0851h

MAC_TX_DEFER_CNT_1

Port 1 MAC Transmit Deferred Count Register,

Section 14.5.2.25

0852h

MAC_TX_PAUSE_CNT_1

Port 1 MAC Transmit Pause Count Register, Section 14.5.2.26

Table 14.12 Indirectly Accessible Switch Control and Status Registers (continued)

SYMBOL

LAN9312 Datasheet(PDF) 311 Page - SMSC Corporation

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