M58BF008

26/36

Figure 12. Program Flowchart and Pseudo Code

Note: 1. If an error is found, the Status Register must be cleared (CLRS instruction) before further P/E.C. operations.

Write 40h/04h

Command

AI02663

Start

Write Address

& Data

Read Status

Register

YES

NO

b7=1

YES

NO

b3=0

NO

b4=0

VPP Invalid

Error (1)

Program

Error (1)

PG/OBPG instructions:

– write 40h/04h command

– write Address & Data

(memory enters read status

state after the PG instruction)

do:

– read status register

(E or G must be toggled)

while b7 = 1

If b3 = 1, VPP invalid error:

– error handler

If b4 = 1, Program error:

– error handler

YES

End

Table 21. Program, Erase Times and Program/Erase Endurance Cycles

Parameter

Test Condition s

Min

Typ

Max

Unit

Main/Overlay Block Program Time

0.14

1.4

sec

0.18

1.8

sec

Main/Overlay Block Erase Time

0.21

2.1

sec

0.33

3.3

sec

Program/Erase Cycles (per Block)

1,000

cycles

10,000

cycles