DIO7495

Version 1.2, Jul 2025

www.dioo.com

© 2025 Dioo Microcircuits Co., Ltd. Jiangsu

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10.Layout Guidelines

For optimal performance, minimize the length of traces as much as possible. It is also recommended to

place the input and output capacitors close to the device to maximize effectiveness and minimize the

effect of potential parasitic trace inductance may have on normal and short-circuit operations. To minimize

parasitic electrical effects and case-to-ambient thermal impedance, use wide traces for VIN, VOUT, and

GND.