S124 datasheet(51/107 Pages) RENESAS

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R01DS0264EU0140 Rev.1.40

Page 51 of 107

Sep 3, 2024

S124 Datasheet

2. Electrical Characteristics

Note 1. The division ratio of ICK and PCKx is the minimum division ratio within the allowable frequency range. The

recovery time is determined by the system clock source.

Note 2. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h.

Note 3. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h.

Note 1. The division ratio of ICK and PCKx is the minimum division ratio within the allowable frequency range. The

recovery time is determined by the system clock source.

Note 2. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h.

Note 3. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h.

Note 1. The sub-clock oscillator or LOCO itself continues oscillating in Software Standby mode during Subosc-speed

mode.

Table 2.26

Timing of recovery from low power modes (3)

Parameter

Symbol Min

Typ

Max

Unit

Test

conditions

Recovery time

from Software

Standby mode*1

Low-speed

mode

Crystal

resonator

connected to

main clock

oscillator

System clock source is

main clock oscillator

(1 MHz)*2

tSBYMC

Figure 2.31

External clock

input to main

clock oscillator

System clock source is

main clock oscillator

(1 MHz)*3

tSBYEX

μs

System clock source is MOCO

tSBYMO

μs

Table 2.27

Timing of recovery from low power modes (4)

Parameter

Symbol Min

Typ

Max

Unit

Test

conditions

Recovery time

from Software

Standby mode*1

Low-voltage

mode

Crystal

resonator

connected to

main clock

oscillator

System clock source is

main clock oscillator

(4 MHz)*2

tSBYMC

Figure 2.31

External clock

input to main

clock oscillator

System clock source is

main clock oscillator

(4 MHz)*3

tSBYEX

108

130

μs

System clock source is HOCO

tSBYHO

108

130

μs

Table 2.28

Timing of recovery from low power modes (5)

Parameter

Symbol Min

Typ

Max

Unit

Test

conditions

Recovery time

from Software

Standby mode*1

SubOSC-speed mode

System clock source is sub-clock

oscillator (32.768 kHz)

tSBYSC

-0.85

Figure 2.31

System clock source is LOCO

(32.768 kHz)

tSBYLO

0.85

1.2

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