16-Channel, 1 MSPS, 12-Bit ADC

with Sequencer

Data Sheet

AD7490

Rev. E

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FEATURES

Fast throughput rate: 1 MSPS

Specified for VDD of 2.7 V to 5.25 V

Low power at maximum throughput rates

5.4 mW maximum at 870 kSPS with 3 V supplies

12.5 mW maximum at 1 MSPS with 5 V supplies

16 (single-ended) inputs with sequencer

Wide input bandwidth: 69.5 dB SNR at 50 kHz input frequency

Flexible power/serial clock speed management

No pipeline delays

High speed serial interface, SPI/QSPI™/MICROWIRE™/

DSP compatible

Full shutdown mode: 0.5 µA maximum

28-lead TSSOP and 32-lead LFCSP packages

AEC-Q100 qualified for automotive applications

APPLICATIONS

Multichannel system monitoring

Battery-powered equipment

Power line monitoring

Data acquisition, instrumentation, and process control

FUNCTIONAL BLOCK DIAGRAM

REFIN

VIN0

VIN15

AGND

VDD

AD7490

INPUT

MUX

12-BIT

SUCCESSIVE

APPROXIMATION

ADC

CONTROL

LOGIC

SEQUENCER

SCLK

DOUT

DIN

CS

VDRIVE

T/H

Figure 1.

GENERAL DESCRIPTION

The AD7490 is a 12-bit high speed, low power, 16-channel,

successive approximation ADC. The part operates from a single

2.7 V to 5.25 V power supply and features throughput rates up

to 1 MSPS. The part contains a low noise, wide bandwidth

track-and-hold amplifier that can handle input frequencies in

excess of 1 MHz.

The conversion process and data acquisition are controlled

using CS and the serial clock signal, allowing the device to

easily interface with microprocessors or DSPs. The input signal

is sampled on the falling edge of CS, and conversion is also

initiated at this point. There are no pipeline delays associated

with the part.

The AD7490 uses advanced design techniques to achieve very

low power dissipation at high throughput rates. For maximum

throughput rates, the AD7490 consumes just 1.8 mA with 3 V

supplies, and 2.5 mA with 5 V supplies.

By setting the relevant bits in the control register, the analog

input range for the part can be selected to be a 0 V to REFIN

input or a 0 V to 2 × REFIN input, with either straight binary

or twos complement output coding. The AD7490 features 16

single-ended analog inputs with a channel sequencer to allow a

preprogrammed selection of channels to be converted sequen-

tially. The conversion time is determined by the SCLK

frequency because this is also used as the master clock to

control the conversion.

The AD7490 is available in a 32-lead LFCSP and a 28-lead

TSSOP package.

PRODUCT HIGHLIGHTS

1. The AD7490 offers up to 1 MSPS throughput rates. At

maximum throughput with 3 V supplies, the AD7490

dissipates just 5.4 mW of power.

2. A sequence of channels can be selected, through which the

AD7490 cycles and converts.

3. The AD7490 operates from a single 2.7 V to 5.25 V supply.

The VDRIVE function allows the serial interface to connect

directly to either 3 V or 5 V processor systems independent

of VDD.

4. The conversion rate is determined by the serial clock,

allowing the conversion time to be reduced through the

serial clock speed increase. The part also features various

shutdown modes to maximize power efficiency at lower

throughput rates. Power consumption is 0.5 µA, maximum,

when in full shutdown.

5. The part features a standard successive approximation

ADC with accurate control of the sampling instant via a CS

input and once off conversion control.