AD7490BCPZ datasheet(14/28 Pages) AD

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AD7490

Data Sheet

Rev. E | Page 14 of 28

SHADOW REGISTER

The Shadow register on the AD7490 is a 16-bit, write-only

falling edge of SCLK. The data is transferred on the DIN line at

the same time that a conversion result is read from the part.

This requires 16 serial falling edges for the data transfer. The

information is clocked into the Shadow register, provided the

SEQ and SHADOW bits are set to 0, 1, respectively, in the

previous write to the control register. MSB denotes the first bit

in the data stream. Each bit represents an analog input from

Channel 0 through Channel 15. A sequence of channels can be

selected through which the AD7490 cycles with each consecutive

CS falling edge after the write to the Shadow register. To select a

sequence of channels, the associated channel bit must be set for

each analog input. The AD7490 continuously cycles through

the selected channels in ascending order, beginning with the

lowest channel, until a write operation occurs (that is, the WRITE

bit is set to 1), with the SEQ and SHADOW bits configured in

any way except 1, 0 (see Table 12). The bit functions are

outlined in Table 13.

Figure 12 reflects the normal operation of a multichannel ADC,

where each serial transfer selects the next channel for conversion.

In this mode of operation, the sequencer function is not used.

DOUT: CONVERSION RESULT FROM

PREVIOUSLY SELECTED CHANNEL ADD3 TO

ADD0

DIN: WRITE TO CONTROL REGISTER,

WRITE BIT = 1,

SELECT CODING, RANGE,AND POWER MODE

SELECT ADD3 TO ADD0 FOR CONVERSION,

SEQ = SHADOW = 0

DIN: WRITE TO CONTROL REGISTER,

WRITE BIT = 1,

SELECT CODING, RANGE, AND POWER MODE

SELECT CHANNEL ADD3 TO ADD0 FOR

CONVERSION,

SEQ = SHADOW = 0

DUMMY CONVERSIONS

DIN = ALL 1s

WRITE BIT = 1,

SEQ = SHADOW = 0

POWER ON

Figure 12. SEQ Bit = 0, SHADOW Bit = 0 Flowchart

Figure 13 shows how to program the AD7490 to continuously

convert on a particular sequence of channels using the Shadow

normal mode of operation of a multichannel ADC (as outlined

in Figure 12), ensure that WRITE = 1 and SEQ = SHADOW = 0

on the next serial transfer.

DIN: WRITE TO CONTROL REGISTER,

WRITE BIT = 1,

SELECT CODING, RANGE, AND POWER MODE

SELECT CHANNEL ADD3 TO ADD0 FOR

CONVERSION,

SEQ = 0 SHADOW = 1

DOUT: CONVERSION RESULT FROM

PREVIOUSLY SELECTED CHANNEL ADD3 TO

ADD0

DIN: WRITE TO SHADOW REGISTER,

SELECTING WHICH CHANNELS TO CONVERT

ON; CHANNELS SELECTED NEED NOT BE

CONSECUTIVE

DUMMY CONVERSIONS

DIN = ALL 1s

POWER ON

CONTINUOUSLY

CONVERTS ON THE

SELECTED SEQUENCE

OF CHANNELS BUT

ALLOWS RANGE,

CODING, AND SO ON,

TO CHANGE IN THE

CONTROL REGISTER

WITHOUT

INTERRUPTING THE

SEQUENCE PROVIDED,

SEQ = 1 SHADOW = 0

WRITE BIT = 0

WRITE

BIT = 0

WRITE BIT = 1,

SEQ = 1, SHADOW = 0

WRITE BIT = 1,

SEQ = 1,

SHADOW = 0

CONTINUOUSLY

CONVERTS ON THE

SELECTED SEQUENCE

OF CHANNELS

Figure 13. SEQ Bit = 0, SHADOW Bit = 1 Flowchart

Table 13. Shadow Register

MSB

LSB

VIN0

VIN1

VIN2

VIN3

VIN4

VIN5

VIN6

VIN7

VIN8

VIN9

VIN10

VIN11

VIN12

VIN13

VIN14

VIN15

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