Data Sheet

ADN4620/ADN4621

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

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Rev. A | 14 of 28

Figure 7. ADN4620 Pin Configuration, SOIC_IC

Table 20. ADN4620 SOIC_IC Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 7

GND1

Ground, Side 1.

2

VIO1

3.3 V Input/Output Power Supply for Side 1. Bypass to the adjacent GND1 pin with a 0.1 μF capacitor.

3

DIN1+

Noninverted Differential Input 1.

4

DIN1−

Inverted Differential Input 1.

5

DIN2+

Noninverted Differential Input 2.

6

DIN2−

Inverted Differential Input 2.

8

VDD1

1.8 V Power Supply for Side 1. Bypass to the adjacent GND1 pin with a 0.1 μF capacitor.

9, 15

GND2

Ground, Side 2.

10

NIC

Not internally connected.

11

DOUT2−

Inverted Differential Output 2.

12

DOUT2+

Noninverted Differential Output 2.

13

DOUT1−

Inverted Differential Output 1.

14

DOUT1+

Noninverted Differential Output 1.

16

VDD2

1.8 V Power Supply for Side 2. Bypass to the adjacent GND2 pin with a 0.1 μF capacitor.