AD7699 datasheet(18/32 Pages) AD

18 / 32 page

AD7699

Data Sheet

Rev. F | Page 18 of 32

Unipolar or Bipolar

Figure 29 shows an example of the recommended connection

diagram for the AD7699 when multiple supplies are available.

Bipolar Single Supply

Figure 30 shows an example of a system with a bipolar input

using single supplies with the internal reference (optional

different VIO supply). This circuit is also useful when the

amplifier/signal conditioning circuit is remotely located with

some common mode present. Note that for any input config-

uration, the inputs, INx, are unipolar and always referenced to

GND (no negative voltages even in bipolar range).

For this circuit, a rail-to-rail input/output amplifier can be used;

however, the offset voltage vs. input common-mode range should

be noted and taken into consideration (1 LSB = 62.5 μV with

VREF = 4.096 V). Note that the conversion results are in twos

complement format when using the bipolar input configuration.

Refer to the AN-581 Application Note, Biasing and Decoupling

Op Amps in Single Supply Applications, at www.analog.com for

additional details about using single-supply amplifiers.

ANALOG INPUTS

Input Structure

Figure 31 shows an equivalent circuit of the input structure of the

AD7699. The two diodes, D1 and D2, provide ESD protection

for the analog inputs, IN[7:0] and COM. Care must be taken to

ensure that the analog input signal does not exceed the supply

rails by more than 0.3 V because this causes the diodes to

become forward-biased and to start conducting current.

These diodes can handle a forward-biased current of 130 mA

maximum. For instance, these conditions may eventually occur

when the input buffer supplies are different from VDD. In such

a case, for example, an input buffer with a short circuit, the

current limitation can be used to protect the part.

CIN

RIN

CPIN

INx+

OR INx–

OR COM

GND

VDD

Figure 31. Equivalent Analog Input Circuit

This analog input structure allows the sampling of the true

differential signal between INx+ and COM or INx+ and INx−.

(COM or INx− = GND ± 0.1 V or VREF ± 0.1 V). By using these

differential inputs, signals common to both inputs are rejected,

as shown in Figure 32.

10k

100

FREQUENCY (kHz)

Figure 32. Analog Input CMRR vs. Frequency

During the acquisition phase, the impedance of the analog inputs

can be modeled as a parallel combination of the capacitor, CPIN,

and the network formed by the series connection of RIN and CIN.

CPIN is primarily the pin capacitance. RIN is typically 400 Ω (8.8 kΩ

when the one-pole filter is active) and is a lumped component

made up of serial resistors and the on resistance of the switches.

CIN is typically 27 pF and is mainly the ADC sampling capacitor.

Selectable Low-Pass Filter

During the conversion phase, where the switches are opened,

the input impedance is limited to CPIN. While the AD7699 is

acquiring, RIN and CIN make a one-pole, low-pass filter that

reduces undesirable aliasing effects and limits the noise from

the driving circuitry. The low-pass filter can be programmed

for the full bandwidth or ¼ of the bandwidth with CFG[6], as

shown in Table 10. Note that the converter throughput must also

be reduced by ¼ when using the filter. If the maximum

throughput is used with the BW set to ¼, the acquisition time of

the converter, tACQ, is violated, resulting in poor THD.

Input Configurations

Figure 33 shows the different methods for configuring the analog

inputs with the configuration register (CFG[12:10]). Refer to

the Configuration Register, CFG section for more details.

AD7699 Datasheet(PDF) 18 Page - Analog Devices

AD7699 Datasheet(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL