AD7699

Data Sheet

Rev. F | Page 24 of 32

when writing the CFG register. Note that at power-up, the CFG

register is undefined and two dummy conversions are required

to update the register. To preload the CFG register with a

factory setting, hold DIN high for two conversions. Thus

CFG[13:0] = 0x3FFF. This sets the AD7699 for the following:



IN[7:0] unipolar referenced to GND, sequenced in order



Full bandwidth for a one-pole filter



Internal reference/temperature sensor disabled, buffer enabled



Enables the sequencer



No readback of the CFG register

Table 10 summarizes the configuration register bit details. See

the Theory of Operation section for more details.

13

12

11

10

9

8

7

6

5

4

3

2

1

0

CFG

INCC

INCC

INCC

INx

INx

INx

BW

REF

REF

REF

SEQ

SEQ

RB

Table 10. Configuration Register Description

Bit(s)

Name

Description

[13]

CFG

Configuration update.

0 = Keep current configuration settings.

1 = Overwrite contents of register.

[12:10]

INCC

Input channel configuration. Selection of pseudobipolar, pseudodifferential, pairs, single-ended, or temperature sensor. Refer to

the Input Configurations section.

Bit 12

Bit 11

Bit 10

Function

0

0

X1

Bipolar differential pairs; INx− referenced to VREF/2 ± 0.1 V.

0

1

0

Bipolar; INx referenced to COM = VREF/2 ± 0.1 V.

0

1

1

Temperature sensor.

1

0

X1

Unipolar differential pairs; INx− referenced to GND ± 0.1 V.

1

1

0

Unipolar, IN0 to IN7 referenced to COM = GND ± 0.1 V (GND sense).

1

1

1

Unipolar, IN0 to IN7 referenced to GND.

[9:7]

INx

Input channel selection in binary fashion.

Bit 9

Bit 8

Bit 7

Channel

0

0

0

IN0

0

0

1

IN1

…

…

…

…

1

1

1

IN7

[6]

BW

Select bandwidth for low-pass filter. Refer to the Selectable Low-Pass Filter section.

0 = ¼ of BW, uses an additional series resistor to further bandwidth limit the noise. Maximum throughput must also be reduced to ¼.

1 = Full BW.

[5:3]

REF2

Reference/buffer selection. Selection of internal, external, and external buffered references, and enabling of the on-chip

temperature sensor. Refer to the Voltage Reference Output/Input section.

Bit 5

Bit 4

Bit 3

Function

0

0

0

Do not use.

0

0

1

Internal reference and temperature sensor enabled. REF = 4.096 V buffered output.

0

1

0

Use external reference. Temperature sensor enabled. Internal buffer disabled.

0

1

1

Use external reference. Internal buffer and temperature sensor enabled.

1

0

0

Do not use.

1

0

1

Do not use.

1

1

0

Use external reference. Internal reference, internal buffer and temperature sensor disabled.

1

1

1

Use external reference. Internal buffer enabled. Internal reference and temperature

sensor disabled.

[2:1]

SEQ

Channel sequencer. Allows for scanning channels in an IN0 to IN[7:0] fashion. Refer to the Sequencer section.

Bit 2

Bit 1

Function

0

0

Disable sequencer.

0

1

Update configuration during sequence.

1

0

Scan IN0 to IN[7:0] (set in CFG[9:7]), then temperature.

1

1

Scan IN0 to IN[7:0] (set in CFG[9:7]).

0

RB

Read back the CFG register.

0 = Read back current configuration at end of data.

1 = Do not read back contents of configuration.

1 X means don’t care.

2 The temperature sensor is always enabled when internal bandgap reference is enabled. See the Voltage Reference Output/Input section.