LT8228 datasheet(40/69 Pages) AD

40 / 69 page

LT8228

Rev. A

For more information www.analog.com

APPLICATIONS INFORMATION

Figure 12. V1 Output Current Limit Programming at ISET1N

For example, if the values of RSNS1 and RIN1 set to 2mΩ

and 1.5k respectively, setting RSET1P to 37.4k programs

the V1 input current limit to 24.3A. During current limit,

current out of the ISET1P pin is 32.4µA.

The current at the ISET1P pin represents the inductor

when the top MOSFET is on during switching. The cur-

rent is discontinuous with high slew rate. To ensure the

current limit is set to the desired average current, a par-

allel capacitor CSET1P to RSET1P is required. The parallel

capacitor CSET1P reduces the ripple voltage at the ISET1P

pin and duty cycle jitter due to noise. The capacitor CSET1P

should not be arbitrarily large as it will affect the stabil-

ity of the current regulation loop. Stability of the current

regulation loop is discussed in detail in the Regulation

Loop and Stability section.

For applications such as battery charging and discharging,

the V1 input current limit is set according to the discharge

current requirement. If V2 is connected to a current or

resistive load, set the V1 input current limit 10% to 20%

above the maximum input current required to provide the

maximum load current at V2 to allow for large transient

events and IV1P(LIM) threshold variations. Dynamic cur-

rent control can also be achieved through modulating the

ISET1P pin resistance. Some dynamic methods include

digital potentiometers or modulating the ground node of

the ISET1P resistor using a DAC or injecting and subtract-

ing current from the ISET1P node.

RSET1N SELECTION FOR V1 OUTPUT CURRENT LIMIT

(BOOST MODE)

In buck mode, V1 output current limit is programmed

by connecting a resistor RSET1N from ISET1N to ground.

The V1 current sense amplifier CSA1 outputs current at

the ISET1N pin that is proportional to the current ISNS1

flowing through the sense resistor RSNS1 as shown in

Figure 12. The current through the sense resistor is equal

to the V1 output current for V1 output currents much

higher than CSA1’s input bias current as stated in the

RSNS1 and RIN1 Selection section.

During current limit, the LT8228 regulates the voltage at

the ISET1N pin to the typical internal reference voltage

of 1.21V. For V1 input current limit IV1N(LIM), calculate

RSET1N according to Equation 26.

RSET1N =

RIN1 • 1.21V

RSNS1 •IV1N(LIM)

(26)

RIN1

RSET1N

CC1

RC1

CSET1N

RSNS1

SNS1P

SNS1N

CSA1

LT8228

IV1

TO M2

ISET1N

ISET2N

1.21V

ERROR AMPLIFIER 1

EA1

FB1

VC1

MAX

MIN

ISNS1

IB1 + ICSA1

IB1

ICSA1

VIREF

8228 F12

RIN1

ISET1N =

ISNS1•RSNS1

RIN1

IV1=ISNS1–IB1

IV1N(LIM) =

RIN1•1.21V

RSNS1•RSET1N

FOR IV1>>IB1

VIREF IS LOWER OF THE VSS AND 1.21V

For example, if the values of RSNS1 and RIN1 set to 2mΩ

and 1.5k respectively, setting RSET1N to 88.7k programs

the V1 output current limit to 10.2A. During current limit,

current out of the ISET1N pin is 13.6µA.

The current at the ISET1N pin represents the inductor

when the top MOSFET is on during switching. The cur-

rent is discontinuous with high slew rate. To ensure the

current limit is set to the desired average current, a par-

allel capacitor CSET1N to RSET1N is required. The parallel

capacitor CSET1N reduces the ripple voltage at the ISET1N

pin and duty cycle jitter due to noise. The capacitor CSET1N

should not be arbitrarily large as it will affect the stabil-

ity of the current regulation loop. Stability of the current

regulation loop is discussed in detail in the Regulation

Loop and Stability section.

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