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ST72325 Datasheet(PDF) 68 Page - STMicroelectronics |
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ST72325 Datasheet(HTML) 68 Page - STMicroelectronics |
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68 / 196 page  68/196 ON-CHIP PERIPHERALS (Cont’d) Input capture function This mode allows the measurement of external signal pulse widths through ARTICRx registers. Each input capture can generate an interrupt inde- pendently on a selected input signal transition. This event is flagged by a set of the corresponding CFx bits of the Input Capture Control/Status regis- ter (ARTICCSR). These input capture interrupts are enabled through the CIEx bits of the ARTICCSR register. The active transition (falling or rising edge) is soft- ware programmable through the CSx bits of the ARTICCSR register. The read only input capture registers (ARTICRx) are used to latch the auto-reload counter value when a transition is detected on the ARTICx pin (CFx bit set in ARTICCSR register). After fetching the interrupt vector, the CFx flags can be read to identify the interrupt source. Note: After a capture detection, data transfer in the ARTICRx register is inhibited until it is read (clearing the CFx bit). The timer interrupt remains pending while the CFx flag is set when the interrupt is enabled (CIEx bit set). This means, the ARTICRx register has to be read at each capture event to clear the CFx flag. The timing resolution is given by auto-reload coun- ter cycle time (1/fCOUNTER). Note: During HALT mode, if both input capture and external clock are enabled, the ARTICRx reg- ister value is not guaranteed if the input capture pin and the external clock change simultaneously. External interrupt capability This mode allows the Input capture capabilities to be used as external interrupt sources. The inter- rupts are generated on the edge of the ARTICx signal. The edge sensitivity of the external interrupts is programmable (CSx bit of ARTICCSR register) and they are independently enabled through CIEx bits of the ARTICCSR register. After fetching the interrupt vector, the CFx flags can be read to iden- tify the interrupt source. During HALT mode, the external interrupts can be used to wake up the micro (if the CIEx bit is set). Figure 44. Input Capture Timing Diagram 04h COUNTER t 01h fCOUNTER xxh 02h 03h 05h 06h 07h 04h ARTICx PIN CFx FLAG ICRx REGISTER INTERRUPT |
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