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ST72325 Datasheet(PDF) 16 Page - STMicroelectronics

Part # ST72325
Description  8-bit MCU with 16 to 60K Flash/ROM, ADC, CSS, 5 timers, SPI, SCI, I2C interface
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72325 Datasheet(HTML) 16 Page - STMicroelectronics

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Notes for Table 2 and Table 3:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,
else the configuration is floating interrupt input.
2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD
are not implemented). See See “I/O PORTS” on page 50. and Section 12.8 I/O PORT PIN CHARACTER-
ISTICS for more details.
3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil-
lator; see Section 1 DESCRIPTION and Section 12.5 CLOCK AND TIMING CHARACTERISTICS for
more details.
4. On the chip, each I/O port may have up to 8 pads:
– In all devices except 48-pin ST72325C, pads that are not bonded to external pins are forced by hardware
in input pull-up configuration after reset. The configuration of these pads must be kept at reset state to
avoid added current consumption.
– In 48-pin ST72325C devices, unbonded pads PA0, PA1, PB6, PB7, PD6, PD7, PE3, PE5, PE6, PE7,
PF3 and PF5) are in input floating configuration after reset. To avoid added current consumption, the
application must force these ports in input pull-up state by writing to the OR and DDR registers after re-
set. This initialization is not necessary in 48-pin ST72325S devices.
5.
Pull-up always activated on PE2 see limitation Section 15.1.8.
6.
It is mandatory to connect all available VDD and VREF pins to the supply voltage and all VSS and VSSA
pins to ground.
28
31
PB0/PWM3
I/O CT
X
ei2
X
X
Port B0
PWM Output 3
Caution: Negative current injec-
tion not allowed on this pin
29
32
PB3/PWM0
I/O CT
X
ei2
X
X
Port B3
PWM Output 0
30
1
PB4 (HS)/ARTCLK
I/O CT HS
X
ei3
X
X
Port B4
PWM-ART External Clock
31
2
PD0/AIN0
I/O CT
X
X
X
X
X
Port D0
ADC Analog Input 0
32
3
PD1/AIN1
I/O CT
X
X
X
X
X
Port D1
ADC Analog Input 1
Pin n°
Pin Name
Level
Port
Main
function
(after
reset)
Alternate function
Input
Output


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