2.3.6

Programmable Counter Divide Ratio (Main B COUNTER)

2 GHz option (11 bit)

MAIN_B_CNTR

Divide Ratio

10

987654321

0

3

0000000001

1

4

0000000010

0

•

••••••••••

•

2,047

1111111111

1

Note 13: Divide ratio: 3 to 2,047 (Divide ratios less than 3 are prohibited)

MAIN_B_CNTR

≥ MAIN_A_CNTR.

See section 2.3.7 for calculation of VCO output frequency.

1.1 GHz option (12 bit)

MAIN_B_CNTR

Divide Ratio

11

10

987654321

0

3

00000000001

1

4

00000000010

0

•

•••••••••••

•

4,095

11111111111

1

Note 14: Divide ratio: 3 to 4,095 (Divide ratios less than 3 are prohibited)

MAIN_B_CNTR

≥ MAIN_A_CNTR.

See section 2.3.7 for calculation of VCO output frequency.

2.3.7

Pulse Swallow Function

The N divider counts such that it divides the VCO RF frequency by (P+1) for A times, and then divides by P for (B – A ) times.

The B value (B_CNTR) must be

≥ 3. The continuous divider range for the Main PLL N divider is from 992 to 65,535 for 2 GHz

option, from 240 to 65,535 for 1.1 GHz option, and from 56 to 32,767 for 500 MHz option. Divider ratios less than the minimum

value are achievable as long as the binary counter value is greater than or equal to the swallow counter value (B_CNTR

≥

A_CNTR).

f

N=(P x B) + A

f

f

R:

Preset divide ratio of binary programmable reference counter (R_CNTR)

N:

Preset divide ratio of main programmable integer N counter (N_CNTR)

B:

Preset divide ratio of binary programmable B counter (B_CNTR)

A:

Preset value of binary 4-bit swallow A counter (A _CNTR)

P:

Preset modulus of dual modulus prescaler (P = 32 for 2 GHz option, P=16 for 1.1 GHz option, and P=8 for 500 MHz

option)

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