TDA7505 datasheet(24/38 Pages) STMICROELECTRONICS

24 / 38 page

Electrical specifications

TDA7505

24/38

Figure 12.

Debug port read timing

Figure 13.

Debug port DBCK next command after read register timing

(Last)

DBCK

(input)

DBOUT

(output)

(7)

(Note 1)

Note:

1 High Impedance, external pull-down resistor

(8)

D02AU1369

(12)

DBCK

(input)

(NEXT COMMAND)

(11)

D02AU1370

Table 20.

ASRC

Symbol

Parameters

Test conditions

min

typ

max

Unit

THD+N

Total harmonic distortion +

noise, unweighted,

Fsin / Fsout = 0.82

(36 kHz

→ 44.1 kHz)

20 Hz–20 kHz, full scale, 16 bit inp.

-95

20 Hz–20 kHz, Full scale, 20 bit inp.

-98

1 kHz, full scale, 16 bit inp.

-95

15 kHz, full scale, 16 bit inp.

-95

1 kHz, full scale, 20 bit inp.

-105

15 kHz, full scale, 20 bit inp.

-98

Dynamic range,

A-weighted, dithered input,

Fsin / Fsout = 0.82

(36 kHz

→ 44.1 kHz)

1 kHz, -60 dB, 16 bit inp.

120

IPD

Interchannel phase deviation

deg

Input sample rate range

No input signal decimation

kHz

Input sample rate

Input signal decimation by 2

kHz

Output sample rate range

kHz

Digital filter

Passband Frequency

0.4110

Fsin

Passband Ripple

0–0.4110 Fsin

-0.01

+0.01

Stopband Corner Frequency

0.5510

Fsin

Stopband Attenuation

@ fs

-120

Table 21.

Fractional-N PLL

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

fVCO

VCO output frequency

130

310

MHz

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