7513 datasheet(49/66 Pages) RENESAS

49 / 66 page

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

7513 Group

CLOCK GENERATING CIRCUIT

The 7513 group has two built-in oscillation circuits. An oscillation

circuit can be formed by connecting a resonator between XIN and

XOUT (XCIN and XCOUT). Use the circuit constants in accordance

with the resonator manufacturer’s recommended values. No exter-

nal resistor is needed between XIN and XOUT since a feed-back

resistor exists on-chip. However, an external feed-back resistor is

needed between XCIN and XCOUT.

To supply a clock signal externally, input it to the XIN pin and make

the XOUT pin open. The sub-clock XCIN-XCOUT oscillation circuit

cannot directly input clocks that are externally generated. Accord-

ingly, be sure to cause an external resonator to oscillate.

Immediately after poweron, only the XIN oscillation circuit starts

oscillating, and XCIN and XCOUT pins go to high impedance state.

Frequency Control

(1) Middle-speed Mode

The internal clock

φ is the frequency of XIN divided by 8.

After reset, this mode is selected.

(2) High-speed Mode

The internal clock

φ is half the frequency of XIN.

(3) Low-speed Mode

qThe internal clock

φ is half the frequency of XCIN.

qA low-power consumption operation can be realized by stopping

the main clock XIN in this mode. To stop the main clock, set bit 5

of the CPU mode register to “1”.

When the main clock XIN is restarted, set enough time for oscil-

lation to stabilize by programming.

Note: If you switch the mode between middle/high-speed and low-

speed, stabilize both X IN and XCIN oscillations. The

sufficient time is required for the sub-clock to stabilize, es-

pecially immediately after poweron and at returning from

stop mode. When switching the mode between middle/high-

speed and low-speed, set the frequency on condition that

f(XIN)>3f(XCIN).

Fig. 53 Ceramic resonator circuit

Fig. 54 External clock input circuit

Oscillation Control

(1) Stop Mode

If the STP instruction is executed, the internal clock

φ stops at an

“H” level, and XIN and XCIN oscillators stop. The value set to the

timer latch 1 and the timer latch 2 is loaded automatically to the

timer 1 and the timer 2. Thus, a value generated time for stabiliz-

ing oscillation should be set to the timer 1 latch and the timer 2

latch (low-order 8 bits for the timer 1, high-order 8 bits for the timer

2) before executing the STP instruction.

Either XIN or XCIN divided by 16 is input to timer 1 as count

source, and the output of timer 1 is connected to timer 2. The bits

of the timer 123 mode register except bit 4 are cleared to “0,” Set

the timer 1 and timer 2 interrupt enable bits to disabled (“0”) be-

fore executing the STP instruction. Oscillator restarts at reset or

when an external interrupt is received, but the internal clock

φ is

not supplied to the CPU until timer 2 underflows. This allows timer

for the clock circuit oscillation to stabilize.

(2) Wait Mode

If the WIT instruction is executed, the internal clock

φ stops at an

“H” level. The states of XIN and XCIN are the same as the state be-

fore the executing the WIT instruction. The internal clock restarts

at reset or when an interrupt is received. Since the oscillator does

not stop, normal operation can be started immediately after the

clock is restarted.

XIN

XOUT

External oscillation

circuit

Open

VCC

VSS

CCIN

CCOUT

XCIN

XCOUT

CIN

COUT

CCIN

CCOUT

XCIN

XCOUT

XIN

XOUT

7513 Datasheet(PDF) 49 Page - Renesas Technology Corp

7513 Datasheet(HTML) 49 Page - Renesas Technology Corp

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