7513 datasheet(33/66 Pages) RENESAS

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

7513 Group

Serial I/O2

The serial I/O2 function can be used only for clock synchronous

serial I/O.

For clock synchronous serial I/O2, the transmitter and the receiver

must use the same clock. When the internal clock is used, transfer

is started by a write signal to the serial I/O2 register.

When an internal clock is selected as the synchronous clock of the

serial I/O2, either P62 or P63 can be selected as an output pin of

the synchronous clock. In this case, the pin that is not selected as

an output pin of the synchronous clock functions as a port.

[Serial I/O2 Control Register (SIO2CON)] 001D16

The serial I/O2 control register contains 8 bits which control vari-

ous serial I/O2 functions.

Fig. 28 Structure of serial I/O2 control register

Serial I/O2 control register

(SIO2CON : address 001D16)

Internal synchronous clock select bits

0 0 0: f(XIN)/8 (f(XCIN)/8 in low-speed mode)

0 0 1: f(XIN)/16 (f(XCIN)/16 in low-speed mode)

0 1 0: f(XIN)/32 (f(XCIN)/32 in low-speed mode)

0 1 1: f(XIN)/64 (f(XCIN)/64 in low-speed mode)

1 0 0:

1 0 1:

1 1 0: f(XIN)/128 (f(XCIN)/128 in low-speed mode)

1 1 1: f(XIN)/256 (f(XCIN)/256 in low-speed mode)

Serial I/O2 port selection bit

0: I/O port

1: SOUT2,SCLK21/SCLK22 signal output

P61/SOUT2 P-channel output disable bit

0: CMOS output (in output mode)

1: N-channel open-drain output

(in output mode)

Transfer direction selection bit

0: LSB first

1: MSB first

Synchronous clock selection bit

0: External clock

1: Internal clock

Synchronous clock output pin selection bit

0: SCLK21

1: SCLK22

b2 b1 b0

Do not set

Fig. 29 Block diagram of serial I/O2 function

f(XIN)

“1”

“0”

“1”

“0”

“1”

(Note)

1/8

1/16

1/32

1/64

1/128

1/256

Data bus

Serial I/O2

interrupt request

Serial I/O2 port selection bit

Serial I/O counter 2 (3)

Serial I/O shift register 2 (8)

Synchronous circuit

Synchronous clock

selection bit

External clock

Internal synchronous

clock select bits

P63 latch

P63/SCLK22

P62/SCLK21

P61/SOUT2

P60/SIN2

P62 latch

P61 latch

(Note)

Note: It is selected by the synchronous clock selection bit, the synchronous

clock output pin selection bit, and the serial I/O port selection bit.

(f(XCIN) in low-speed mode)

7513 Datasheet(PDF) 33 Page - Renesas Technology Corp

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