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7513 Datasheet(PDF) 29 Page - Renesas Technology Corp |
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7513 Datasheet(HTML) 29 Page - Renesas Technology Corp |
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29 / 66 page ![]() 28 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS 7513 Group SERIAL I/O Serial I/O1 Serial I/O1 can be used as either clock synchronous or asynchro- nous (UART) serial I/O. A dedicated timer (baud rate generator) is also provided for baud rate generation. (1) Clock Synchronous Serial I/O Mode Clock synchronous serial I/O1 can be selected by setting the mode selection bit of the serial I/O1 control register to “1”. For clock synchronous serial I/O1, the transmitter and the receiver must use the same clock. If an internal clock is used, transfer is started by a write signal to the transmit/receive buffer registers. Fig. 23 Block diagram of clock synchronous serial I/O1 Fig. 24 Operation of clock synchronous serial I/O1 function P46/SCLK P47/SRDY1 P44/RXD P45/TXD f(XIN) 1/4 1/4 F/F Serial I/O1 status register Serial I/O1 control register Receive buffer register Address 001816 Receive shift register Receive buffer full flag (RBF) Receive interrupt request (RI) Clock control circuit Shift clock Serial I/O1 clock selection bit Frequency division ratio 1/(n+1) Baud rate generator Address 001C16 BRG count source selection bit Clock control circuit Falling-edge detector Data bus Address 001816 Shift clock Transmit shift register shift completion flag (TSC) Transmit buffer empty flag (TBE) Transmit interrupt request (TI) Transmit interrupt source selection bit Address 001916 Data bus Address 001A16 Transmit buffer register Transmit shift register (f(XCIN) in low-speed mode) Receive enable signal SRDY1 D7 D0 D1 D2 D3 D4 D5 D6 RBF = 1 TSC = 1 TBE = 0 TBE = 1 TSC = 0 Transfer shift clock (1/2 to 1/2048 of the internal clock, or an external clock) Serial output TXD Serial input RXD Write signal to receive/transmit buffer register (address 001816) Overrun error (OE) detection Notes 1 : The transmit interrupt (TI) can be selected to occur either when the transmit buffer register has emptied (TBE=1) or after the transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the serial I/O1 control register. 2 : If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data is output continuously from the TXD pin. 3 : The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” . D7 D0 D1 D2 D3 D4 D5 D6 |
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