R8C2A datasheet(55/609 Pages) RENESAS

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R8C/2A Group, R8C/2B Group

5. Resets

Rev.2.00

Nov 26, 2007

Page 35 of 580

REJ09B0324-0200

Table 5.2 shows the Pin Functions while RESET Pin Level is “L”, Figure 5.2 shows the CPU Register Status after

Reset, Figure 5.3 shows the Reset Sequence, and Figure 5.4 shows the OFS Register.

Figure 5.2

CPU Register Status after Reset

Table 5.2

Pin Functions while RESET Pin Level is “L”

Pin Name

Pin Functions

P0 to P3

Input port

P4_3 to P4_7

Input port

P5_0 to P5_4

Input port

P8_0 to P8_6

Input port

b19

Interrupt table register(INTB)

Program counter(PC)

User stack pointer(USP)

Interrupt stack pointer(ISP)

Static base register(SB)

Content of addresses 0FFFEh to 0FFFCh

Flag register(FLG)

IPL

b15

0000h

Data register(R0)

Data register(R1)

Data register(R2)

Data register(R3)

Address register(A0)

Address register(A1)

Frame base register(FB)

00000h

0000h

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