R8C2A datasheet(90/609 Pages) RENESAS

90 / 609 page

R8C/2A Group, R8C/2B Group

7. Programmable I/O Ports

Rev.2.00

Nov 26, 2007

Page 70 of 580

REJ09B0324-0200

Figure 7.14

P2DRR Register

Figure 7.15

PMR Register

Port P2 Drive Capacity Control Register

Symbol

Address

After Reset

P2DRR

00F4h

00h

Bit Symbol

Bit Name

Function

NOTE:

1. Both “H” and “L” output are set to high drive capacity.

P2DRR7

P2DRR5

Set P2 output transistor drive capacity

0 : Low

1 : High(1)

P2DRR2

P2_7 drive capacity

P2_3 drive capacity

P2DRR6

P2_6 drive capacity

b3 b2 b1 b0

P2DRR0

b7 b6 b5 b4

P2_1 drive capacity

P2_0 drive capacity

P2DRR3

P2_2 drive capacity

P2DRR1

P2DRR4

P2_4 drive capacity

P2_5 drive capacity

Port Mode Register

Symbol

Address

After Reset

PMR

00F8h

00h

Bit Symbol

Bit Name

Function

INT1

_____

pin select bit

INT2

_____

pin select bit

IICSEL

0 : Selects SSU function

1 : Selects I2C bus function

0 : Selects P6_6

1 : Selects P3_2

To use the UART1, set to 1.

Set to 0.

SSU / I2C bus sw itch bit

Reserved bits

U1PINSEL

UART1 enable bit

INT2SEL

—

(b6-b5)

INT1SEL

0 : Selects P1_5, P1_7

1 : Selects P3_6

b3 b2

b7 b6 b5 b4

—

(b3-b2)

Reserved bits

Set to 0.

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