SH7261 datasheet(586/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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586 / 1348 page

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 554 of 1312

REJ09B0320-0200

12.7.4

Contention between TCNT Write and Clear Operations

If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing takes

precedence and the TCNT write is not performed.

Figure 12.109 shows the timing in this case.

Counter clear

signal

Write signal

Address

TCNT address

TCNT

TCNT write cycle

H'0000

Figure 12.109 Contention between TCNT Write and Clear Operations

12.7.5

Contention between TCNT Write and Increment Operations

If incrementing occurs in the T2 state of a TCNT write cycle, the TCNT write takes precedence

and TCNT is not incremented.

Figure 12.110 shows the timing in this case.

TCNT input

clock

Write signal

Address

TCNT address

TCNT

TCNT write cycle

TCNT write data

Figure 12.110 Contention between TCNT Write and Increment Operations

SH7261 Datasheet(PDF) 586 Page - Renesas Technology Corp