SH7261 datasheet(674/1348 Pages) RENESAS

674 / 1348 page

Section 15 Realtime Clock (RTC)

Rev. 2.00 Sep. 07, 2007 Page 642 of 1312

REJ09B0320-0200

Abbreviation

R/W

Initial Value

Address

Access

Size

RTC control register 1

RCR1

R/W

H'00

H'FFFE081C

RTC control register 2

RCR2

R/W

H'09

H'FFFE081E

RTC control register 3

RCR3

R/W

H'00

H'FFFE0824

15.3.1

64-Hz Counter (R64CNT)

R64CNT indicates the state of the divider circuit between 64 Hz and 1 Hz.

Reading this register, when carry from 128-Hz divider stage is generated, sets the CF bit in the

RTC control register 1 (RCR1) to 1 so that the carrying and reading 64 Hz counter are performed

at the same time is indicated. In this case, the R64CNT should be read again after writing 0 to the

CF bit in RCR1 since the read value is not valid.

After the RESET bit or ADJ bit in the RTC control register 2 (RCR2) is set to 1, the RTC divider

circuit is initialized and R64CNT is initialized to H'00.

R64CNT is not initialized by a power-on reset or manual reset, or in deep standby and software

standby modes.

Bit:

Initial value:

R/W:

—

———————

1Hz

2Hz

4Hz

8Hz

16Hz 32Hz 64Hz

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This bit is always read as 0. The write value should

always be 0.

1 Hz

Undefined

2 Hz

Undefined

4 Hz

Undefined

8 Hz

Undefined

16 Hz

Undefined

32 Hz

Undefined

64 Hz

Undefined

Indicate the state of the divider circuit between

64 Hz and 1 Hz.

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