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SH7261 Datasheet(PDF) 1135 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1135 Page - Renesas Technology Corp |
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1135 / 1348 page ![]() Section 25 Pin Function Controller (PFC) Rev. 2.00 Sep. 07, 2007 Page 1103 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 13, 12 PC11MD [1:0] 00/01* R/W PC11 Mode These bits control the function of the PC11/ WR2/ TIOC2A/DACT2 pin. 00: PC11 I/O (port) 01: WR2 output (BSC) 10: TIOC2A I/O (MTU2) 11: DACT2 output (DMAC) 11 to 9 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 8 PC10MD0 0/1* R/W PC10 Mode This bit controls the function of the PC10/ WR1 pin. 0: PC10 I/O (port) 1: WR1 output (BSC) 7 to 5 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 4 PC9MD0 1 R/W PC9 Mode This bit controls the function of the PC9/ WR0 pin. 0: PC9 I/O (port) 1: WR0 output (BSC) 3 to 1 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 0 PC8MD0 1 R/W PC8 Mode This bit controls the function of the PC8/ RD pin. 0: PC8 I/O (port) 1: RD output (BSC) Note: * The initial value depends on the LSI's operating mode. |
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