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SH7261 Datasheet(PDF) 1139 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1139 Page - Renesas Technology Corp |
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1139 / 1348 page ![]() Section 25 Pin Function Controller (PFC) Rev. 2.00 Sep. 07, 2007 Page 1107 of 1312 REJ09B0320-0200 25.1.7 Port D I/O Register (PDIOR) PDIOR are 16-bit readable/writable registers that select the I/O direction for the port D pins. Bits PD14IOR to PD0IOR correspond to pins PD14 to PD0, respectively. PDIOR are enabled when the function of the port D pins is set to general-purpose I/O (PD14 to PD0) and to TIOC I/O (MTU2) by PDCR, and are disabled in other cases. When a bit in PDIOR is set to 1, the corresponding pin is set to output, and when set to 0, the pin is set to input. Bits 15 in PDIOR is reserved. These bits are always read as 0. The write value should always be 0. PDIOR are initialized to H'0000 by a power-on reset or by switching to deep standby mode. These registers are not initialized either by a manual reset or by switching to sleep mode or software standby mode. 15 14 13 12 11 10 9876543210 Bit: Initial value: R/W: 0000000000000000 R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W — PD14 IOR PD13 IOR PD12 IOR PD11 IOR PD10 IOR PD9 IOR PD8 IOR PD7 IOR PD6 IOR PD5 IOR PD4 IOR PD3 IOR PD2 IOR PD1 IOR PD0 IOR |
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