HD64F36074G datasheet(17/564 Pages) RENESAS

17 / 564 page

Rev. 3.00 Sep. 10, 2007 Page xvii of xxxii

17.4.7

Noise Filter ....................................................................................................... 357

17.4.8

Example of Use................................................................................................. 357

17.5

Interrupt Request............................................................................................................... 362

17.6

Bit Synchronous Circuit.................................................................................................... 363

17.7

Usage Notes ...................................................................................................................... 364

17.7.1

Issue (Retransmission) of Start/Stop Conditions .............................................. 364

17.7.2

WAIT Setting in I

2C Bus Mode Register (ICMR) ............................................ 364

17.7.3

Restriction in Use of Multi-Master ................................................................... 365

17.7.4

Continuous Data Reception in Master Receive Mode ...................................... 365

Section 18 A/D Converter....................................................................................367

18.1

Features............................................................................................................................. 367

18.2

Input/Output Pins .............................................................................................................. 369

18.3

Register Descriptions ........................................................................................................ 370

18.3.1

A/D Data Registers A to D (ADDRA to ADDRD) .......................................... 370

18.3.2

A/D Control/Status Register (ADCSR) ............................................................ 371

18.3.3

A/D Control Register (ADCR) ......................................................................... 372

18.4

Operation .......................................................................................................................... 373

18.4.1

Single Mode...................................................................................................... 373

18.4.2

Scan Mode ........................................................................................................ 373

18.4.3

Input Sampling and A/D Conversion Time....................................................... 374

18.4.4

External Trigger Input Timing.......................................................................... 375

18.5

A/D Conversion Accuracy Definitions ............................................................................. 376

18.6

Usage Notes ...................................................................................................................... 378

18.6.1

Permissible Signal Source Impedance .............................................................. 378

18.6.2

Influences on Absolute Accuracy ..................................................................... 378

Section 19 Band-Gap Circuit, Power-On Reset, and

Low-Voltage Detection Circuits........................................................379

19.1

Features............................................................................................................................. 380

19.2

Register Descriptions ........................................................................................................ 382

19.2.1

Low-Voltage-Detection Control Register (LVDCR) ........................................ 382

19.2.2

Low-Voltage-Detection Status Register (LVDSR)........................................... 384

19.2.3

Reset Source Decision Register (LVDRF)........................................................ 385

19.3

Operations......................................................................................................................... 386

19.3.1

Power-On Reset Circuit .................................................................................... 386

19.3.2

Low-Voltage Detection Circuit......................................................................... 387

19.3.3

Deciding Reset Source ...................................................................................... 392

HD64F36074G Datasheet(PDF) 17 Page - Renesas Technology Corp

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