AFE5804 datasheet(48/60 Pages) TI

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PROGRAMMABLE POST-GAIN AMPLIFIER

CLAMPING

LOW-PASS FILTER

Clamp

Gain

Control

Bits

From

Attenuator

Clamp

Control

Bit

Low-Pass

Filter

PGA

VCM

(+1.65V)

ToADC

Inputs

CLAMP

LPF

AFE5804

SBOS442A – JUNE 2008 – REVISED SEPTEMBER 2008 ................................................................................................................................................ www.ti.com

(PGA)

To further optimize the overload recovery behavior of

Following the VCA is a programmable post-gain

a complete TGC channel, the AFE5804 integrates a

amplifier

(PGA).

Figure

shows

simplified

clamping stage, as shown in Figure 98. This clamping

schematic of the PGA, including the clamping stage.

stage precedes the low-pass filter in order to prevent

The gain of this PGA can be configured to four

the filter circuit from being driven into overload, the

different gain settings: 20dB, 25dB, 27dB, and 30dB,

result of which would be an extended recovery time.

programmable through the serial port; see Table 10.

The clamping level is fixed to clamp the signal level

to approximately 2.3VPP differential.

The

PGA

structure

consists

differential,

programmable-gain

voltage-to-current

converter

stage followed by transimpedance amplifiers to buffer

each side of the differential output. Low input noise is

The AFE5804 integrates an anti-aliasing filter in the

also a requirement for the PGA design as a result of

form of a programmable low-pass filter (LPF) for each

the large amount of signal attenuation that can be

channel. The LPF is designed as a differential, active,

applied in the preceding VCA stage. At minimum

second-order

filter

that

approximates

Bessel

VCA attenuation (used for small input signals), the

characteristic, with typically 12dB per octave roll-off.

LNA noise dominates; at maximum VCA attenuation

Figure 98 shows the simplified schematic of half the

(large input signals), the attenuator and PGA noise

differential

active

low-pass

filter.

Programmable

dominates.

through the serial interface, the –3dB frequency

corner can be set to either 12.5MHz or 17MHz. The

filter bandwidth is set for all channels simultaneously.

Figure 97. Post-Gain Amplifier

(Simplified Schematic)

Figure 98. Clamping Stage and Low-Pass Filter (Simplified Schematic)

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