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R8C27 Datasheet(PDF) 97 Page - Renesas Technology Corp |
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R8C27 Datasheet(HTML) 97 Page - Renesas Technology Corp |
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97 / 485 page  R8C/26 Group, R8C/27 Group 10. Clock Generation Circuit Rev.2.10 Sep 26, 2008 Page 80 of 453 REJ09B0278-0210 Figure 10.1 Clock Generation Circuit Oscillation stop detection Divider S Q R 1/2 1/2 1/2 1/2 1/2 Pulse generation circuit for clock edge detection and charge, discharge control circuit Charge, discharge circuit Oscillation stop detection interrupt generation circuit detection S Q R FRA00 High-speed on-chip oscillator FRA01 = 1 FRA01 = 0 CM14 CPU clock a b c d e OCD2 = 0 OCD2 = 1 XIN clock CM02 WAIT instruction RESET CM10 = 1 (stop mode) a d c h b CM06 = 0 CM17 to CM16 = 11b CM06 = 1 CM06 = 0 CM17 to CM16 = 10b CM06 = 0 CM17 to CM16 = 01b CM06 = 0 CM17 to CM16 = 00b Detail of divider Oscillation Stop Detection Circuit XIN clock Forcible discharge when OCD0 = 0 OCD1 Oscillation stop detection, Watchdog timer, Voltage monitor 1 interrupt, Voltage monitor 2 interrupt e g UART0 A/D converter Timer RC Timer RB Timer RA FRA2 register fOCO fOCO-S g f1 f2 f4 f8 f32 INT0 SSU / I2C bus Watchdog timer System clock FRA1 register Frequency adjustable UART1 Divider fOCO40M On-chip oscillator clock Timer RE fOCO-F XOUT/XCOUT(1) XIN/XCIN(1) Power-on reset circuit Voltage detection circuit Divider fOCO128 Power-on reset Software reset Interrupt request CM04 CM01 = 0 CM01 = 1 XCIN clock CM01 = 0 CM13 CM05 CM01 Low-speed on-chip oscillator CM01, CM02, CM04, CM05, CM06: Bits in CM0 register CM10, CM13, CM14, CM16, CM17: Bits in CM1 register OCD0, OCD1, OCD2: Bits in OCD register FRA00, FRA01: Bits in FRA0 register Watchdog timer interrupt OCD2 bit switch signal CM14 bit switch signal Voltage monitor 2 interrupt Voltage monitor 1 interrupt Stop signal fC4 fC32 fC 1/8 1/4 NOTE: 1. For J, K version, the XCIN clock oscillation circuit cannot be used. Clock prescaler |
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