SH7018 datasheet(63/431 Pages) RENESAS

63 / 431 page

Section 5 Exception Processing

5.1

Overview

5.1.1

Types of Exception Processing and Priority

Exception processing is started by four sources: resets, address errors, interrupts and instructions

and have the priority shown in table 5.1. When several exception processing sources occur at once,

they are processed according to the priority shown.

Table 5.1

Types of Exception Processing and Priority Order

Exception

Source

Priority

Reset

Power-on reset

High

Address

error

CPU address error

Interrupt

NMI

IRQ

On-chip peripheral modules:

• Multifunction timer/pulse unit (MTU)

• Serial communications interface (SCI)

• A/D converter (A/D)

• Compare match timer (CMT)

• Watchdog timer (WDT)

• 8-bit timer 2 (TIM2)

Instructions Trap instruction (TRAPA instruction)

General illegal instructions (undefined code)

Illegal slot instructions (undefined code placed directly after a delay branch

instruction*

1 or instructions that rewrite the PC*2)

Low

Notes: 1. Delayed branch instructions: JMP, JSR, BRA, BSR, RTS, RTE, BF/S, BT/S, BSRF,

BRAF.

2. Instructions that rewrite the PC: JMP, JSR, BRA, BSR, RTS, RTE, BT, BF, TRAPA,

BF/S, BT/S, BSRF, BRAF.

SH7018 Datasheet(PDF) 63 Page - Renesas Technology Corp