SH7018 datasheet(66/431 Pages) RENESAS

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Table 5.3

Exception Processing Vector Table (cont)

Exception Sources

Vector

Numbers

Vector Table Address Offset

Interrupts

IRQ0

H'00000100 to H'00000103

IRQ1

H'00000104 to H'00000107

IRQ2

H'00000108 to H'0000010B

IRQ3

H'0000010C to H'0000010F

(Reserved by system)

H'00000110 to H'00000113

H'00000114 to H'00000117

Interrupts

IRQ6

H'00000118 to H'0000011B

IRQ7

H'0000011C to H'0000011F

On-chip peripheral

module*

255

H'00000120 to H'00000124

H'000003FC to H'000003FF

Note: * The vector numbers and vector table address offsets for each on-chip peripheral module

interrupt are given in section 6, Interrupt Controller, table 6.3, Interrupt Exception

Processing Vectors and Priorities.

Table 5.4

Calculating Exception Processing Vector Table Addresses

Exception Source

Vector Table Address Calculation

Resets

Vector table address = (vector table address offset)

= (vector number)

× 4

Address errors, interrupts,

instructions

Vector table address = VBR + (vector table address offset)

= VBR + (vector number)

× 4

Notes: 1. VBR: Vector base register

2. Vector table address offset: See table 5.3.

3. Vector number: See table 5.3.

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