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SH7052 Datasheet(PDF) 420 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 420 Page - Renesas Technology Corp |
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420 / 919 page  394 Input Capture Operation when Free-Running Counter is Halted: In channels 0 to 5, channel 10, or channel 11, if input capture setting is performed and a trigger signal is input from the input pin, the TCNT value will be transferred to the corresponding general register (GR) or input capture register (ICR) irrespective of whether the free-running counter (TCNT) is running or halted, and the IMF or ICF bit will be set in the timer status register (TSR). The timing in this case is shown in figure 10.71. Pø N Internal input capture signal Interrupt status flag IMF (ICF) Timer status register TSR TCNT GR (ICR) N Figure 10.71 Input Capture Operation before Free-Running Counter is Started |
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