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SH7052 Datasheet(PDF) 440 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 440 Page - Renesas Technology Corp |
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440 / 919 page  414 12.1.2 Block Diagram Figure 12.1 is the block diagram of the WDT. φ/2 φ/64 φ/128 φ/256 φ/512 φ/1024 φ/4096 φ/8192 Internal clock sources Clock Overflow Clock select Interrupt control Reset control RSTCSR TCSR: TCNT: RSTCSR: Timer control/status register Timer counter Reset control/status register TCNT TCSR Module bus Bus interface ITI (interrupt signal) WDTOVF Internal reset signal* WDT Note: * The internal reset signal can be generated by making a register setting. Figure 12.1 WDT Block Diagram 12.1.3 Pin Configuration Table 12.1 shows the pin configuration. Table 12.1 Pin Configuration Pin Abbreviation I/O Function Watchdog timer overflow WDTOVF O Outputs the counter overflow signal in watchdog timer mode |
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