SH7052 datasheet(471/919 Pages) RENESAS

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14.2.4

Transmit Data Register (TDR)

The transmit data register (TDR) is an 8-bit register that stores data for serial transmission. When

the SCI detects that the transmit shift register (TSR) is empty, it moves transmit data written in

TDR into TSR and starts serial transmission. Continuous serial transmission is possible by writing

the next transmit data in TDR during serial transmission from TSR.

The CPU can always read and write to TDR. TDR is initialized to H'FF by a power-on reset, and

in hardware standby mode and software standby mode. It is not initialized by a manual reset.

Bit:

Initial value:

R/W:

R/W

14.2.5

Serial Mode Register (SMR)

The serial mode register (SMR) is an 8-bit register that specifies the SCI serial communication

format and selects the clock source for the baud rate generator.

The CPU can always read and write to SMR. SMR is initialized to H'00 by a power-on reset and

in hardware standby mode. It is not initialized by a manual reset, and in software standby mode.

Bit:

CHR

STOP

CKS1

CKS0

Initial value:

R/W:

R/W

• Bit 7—Communication Mode (C/A): Selects whether the SCI operates in asynchronous or

synchronous mode.

Bit 7: C/

Description

Asynchronous mode

(Initial value)

Synchronous mode

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