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SH7052 Datasheet(PDF) 475 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 475 Page - Renesas Technology Corp |
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475 / 919 page  449 • Bit 5—Transmit Enable (TE): Enables or disables the SCI serial transmitter. Bit 5: TE Description 0 Transmitter disabled (Initial value) The transmit data register empty bit (TDRE) in the serial status register (SSR) is locked at 1. 1 Transmitter enabled Serial transmission starts when the transmit data register empty (TDRE) bit in the serial status register (SSR) is cleared to 0 after writing of transmit data into TDR. Select the transmit format in SMR before setting TE to 1. • Bit 4—Receive Enable (RE): Enables or disables the SCI serial receiver. Bit 4: RE Description 0 Receiver disabled (Initial value) Clearing RE to 0 does not affect the receive flags (RDRF, FER, PER, ORER). These flags retain their previous values. 1 Receiver enabled Serial reception starts when a start bit is detected in asynchronous mode, or synchronous clock input is detected in synchronous mode. Select the receive format in SMR before setting RE to 1. |
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