| Electronic Components Datasheet Search |
|
SH7052 Datasheet(PDF) 582 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7052 Datasheet(HTML) 582 Page - Renesas Technology Corp |
|
582 / 919 page ![]() 556 15.3.8 DMAC Interface The DMAC can be activated by reception of a message in HCAN’s mailbox 0. When DMAC transfer ends after DMAC activation has been set, the RXPR0 and RFPR0 flags are acknowledge signal automatically. An interrupt request due to a receive interrupt from the HCAN cannot be sent to the CPU in this case. Figure 15.13 shows a DMAC transfer flowchart. End of DMAC transfer? End No DMAC initialization • Activation source setting • Source/destination address settings • Transfer count setting • Interrupt setting Message reception in HCAN’s mailbox 0 DMAC activation DMAC transfer end bit setting RXPR and RFPR clearing DMAC interrupt enabled? No Interrupt to CPU Clear DMAC interrupt flag Yes Yes : Settings by user : Processing by hardware Figure 15.13 DMAC Transfer Flowchart |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |