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SH7052 Datasheet(PDF) 617 Page - Renesas Technology Corp

Part # SH7052
Description  SuperHTM RISC engine
PDF  919 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 Datasheet(HTML) 617 Page - Renesas Technology Corp

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Section 17 Advanced User Debugger (AUD)
17.1
Overview
The SH7052F/SH7053F/SH7054F has an on-chip advanced user debugger (AUD). Use of the
AUD simplifies the construction of a simple emulator, with functions such as acquisition of
branch trace data and monitoring/tuning of on-chip RAM data.
17.1.1
Features
The AUD has the following features:
• Eight input/output pins
 Data bus (AUDATA3 to AUDATA0)
 AUD reset (AUDRST)
 AUD sync signal (AUDSYNC)
 AUD clock (AUDCK)
 AUD mode (AUDMD)
• Two modes
Branch trace mode or RAM monitor mode can be selected by switching AUDMD.
 Branch trace mode
When the PC branches on execution of a branch instruction or generation of an interrupt in
the user program , the branch is detected by the AUD and the branch destination address is
output from AUDATA. The address is compared with the previously output address, and
4-, 8-, 16-, or 32-bit output is selected automatically according to the upper address
matching status.
 RAM monitor mode
When an address is written to AUDATA from off-chip, the data corresponding to that
address is output. If an address and data are written to AUDATA, the data is transferred to
that address.



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