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SH7052 Datasheet(PDF) 686 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 686 Page - Renesas Technology Corp |
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686 / 919 page ![]() 660 • Bit 0—PK0 Mode Bit (PK0MD): Selects the function of pin PK0/TO8A. Bit 0: PK0MD Description 0 General input/output (PK0) (Initial value) 1 ATU one-shot pulse output (TO8A) 18.3.22 Port K Invert Register (PKIR) Bit: 15 14 13 12 11 10 9 8 PK15IR PK14IR PK13IR PK12IR PK11IR PK10IR PK9IR PK8IR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 7 6 5 4 3 2 1 0 PK7IR PK6IR PK5IR PK4IR PK3IR PK2IR PK1IR PK0IR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W The port K invert register (PKIR) is a 16-bit readable/writable register that sets the port K inversion function. Bits PK15IR to PK0IR correspond to pins PK15/TO8P to PK0/TO8A. PKIR is enabled when port K pins function as ATU outputs, and disabled otherwise. When port K pins function as ATU outputs, the value of a pin is inverted when the corresponding bit in PKIR is set to 1. PKIR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in hardware standby mode. It is not initialized in software standby mode or sleep mode. PKnIR Description 0 Value is not inverted (Initial value) 1 Value is inverted n = 15 to 0 |
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