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SH7052 Datasheet(PDF) 688 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 688 Page - Renesas Technology Corp |
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688 / 919 page  662 19.2 Port A Port A is an input/output port with the 16 pins shown in figure 19.1. PA15 (I/O) /RxD0 (input) PA14 (I/O) /TxD0 (output) PA13 (I/O) /TIO5B (I/O) PA12 (I/O) /TIO5A (I/O) PA11 (I/O) /TIO4D (I/O) PA10 (I/O) /TIO4C (I/O) PA9 (I/O) /TIO4B (I/O) PA8 (I/O) /TIO4A (I/O) PA7 (I/O) /TIO3D (I/O) PA5 (I/O) /TIO3B (I/O) PA4 (I/O) /TIO3A (I/O) PA3 (I/O) /TIOD (input) PA2 (I/O) /TIOC (input) PA1 (I/O) /TIOB (input) PA0 (I/O) /TIOA (input) PA6 (I/O) /TIO3C (I/O) Port A Figure 19.1 Port A 19.2.1 Register Configuration The port A register configuration is shown in table 19.1. Table 19.1 Register Configuration Name Abbreviation R/W Initial Value Address Access Size Port A data register PADR R/W H'0000 H'FFFFF726 8, 16 Note: A register access is performed in four or five cycles regardless of the access size. |
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