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SH7052 Datasheet(PDF) 689 Page - Renesas Technology Corp

Part # SH7052
Description  SuperHTM RISC engine
PDF  919 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 Datasheet(HTML) 689 Page - Renesas Technology Corp

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19.2.2
Port A Data Register (PADR)
Bit:
15
14
13
12
11
10
9
8
PA15
DR
PA14
DR
PA13
DR
PA12
DR
PA11
DR
PA10
DR
PA9
DR
PA8
DR
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
7
6
5
4
3
2
1
0
PA7
DR
PA6
DR
PA5
DR
PA4
DR
PA3
DR
PA2
DR
PA1
DR
PA0
DR
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The port A data register (PADR) is a 16-bit readable/writable register that stores port A data. Bits
PA15DR to PA0DR correspond to pins PA15/RxD0 to PA0/TI0A.
When a pin functions as a general output, if a value is written to PADR, that value is output
directly from the pin, and if PADR is read, the register value is returned directly regardless of the
pin state.
When a pin functions as a general input, if PADR is read the pin state, not the register value, is
returned directly. If a value is written to PADR, although that value is written into PADR it does
not affect the pin state. Table 19.2 summarizes port A data register read/write operations.
PADR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
Table 19.2
Port A Data Register (PADR) Read/Write Operations
Bits 15 to 0:
PAIOR
Pin Function
Read
Write
0
General input
Pin state
Value is written to PADR, but does not affect pin
state
Other than
general input
Pin state
Value is written to PADR, but does not affect pin
state
1
General output
PADR value
Write value is output from pin
Other than
general output
PADR value
Value is written to PADR, but does not affect pin
state



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