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SH7052 Datasheet(PDF) 707 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 707 Page - Renesas Technology Corp |
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707 / 919 page  681 19.10 Port J Port J is an input/output port with the 16 pins shown in figure 19.9. PJ15 (I/O) /TI9F (input) PJ14 (I/O) /TI9E (input) PJ13 (I/O) /TI9D (input) PJ12 (I/O) /TI9C (input) PJ11 (I/O) /TI9B (input) PJ10 (I/O) /TI9A (input) PJ9 (I/O) /TIO5D (I/O) PJ8 (I/O) /TIO5C (I/O) PJ7 (I/O) /TIO2H (I/O) PJ5 (I/O) /TIO2F (I/O) PJ4 (I/O) /TIO2E (I/O) PJ3 (I/O) /TIO2D (I/O) PJ2 (I/O) /TIO2C (I/O) PJ1 (I/O) /TIO2B (I/O) PJ0 (I/O) /TIO2A (I/O) PJ6 (I/O) /TIO2G (I/O) Port J Figure 19.9 Port J 19.10.1 Register Configuration The port J register configuration is shown in table 19.17. Table 19.17 Register Configuration Name Abbreviation R/W Initial Value Address Access Size Port J data register PJDR R/W H'0000 H'FFFFF76C 8, 16 Note: A register access is performed in four or five cycles regardless of the access size. |
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