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SH7052 Datasheet(PDF) 710 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 710 Page - Renesas Technology Corp |
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710 / 919 page ![]() 684 19.11.2 Port K Data Register (PKDR) Bit: 15 14 13 12 11 10 9 8 PK15 DR PK14 DR PK13 DR PK12 DR PK11 DR PK10 DR PK9 DR PK8 DR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 7 6 5 4 3 2 1 0 PK7 DR PK6 DR PK5 DR PK4 DR PK3 DR PK2 DR PK1 DR PK0 DR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W The port K data register (PKDR) is a 16-bit readable/writable register that stores port K data. Bits PK15DR to PK0DR correspond to pins PK15/TO8P to PK0/TO8A. When a pin functions as a general output, if a value is written to PKDR, that value is output directly from the pin, and if PKDR is read, the register value is returned directly regardless of the pin state. When a pin functions as a general input, if PKDR is read the pin state, not the register value, is returned directly. If a value is written to PKDR, although that value is written into PKDR it does not affect the pin state. Table 19.20 summarizes port K data register read/write operations. PKDR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in hardware standby mode. It is not initialized in software standby mode or sleep mode. Table 19.20 Port K Data Register (PKDR) Read/Write Operations Bits 15 to 0: PKIOR Pin Function Read Write 0 General input Pin state Value is written to PKDR, but does not affect pin state Other than general input Pin state Value is written to PKDR, but does not affect pin state 1 General output PKDR value Write value is output from pin Other than general output PKDR value Value is written to PKDR, but does not affect pin state |
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