SH7052 datasheet(853/919 Pages) RENESAS

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24.3.4

Bus Timing

Table 24.9 shows bus timing.

Table 24.9

Bus Timing

Conditions: V

CC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 3.3 V ±0.3 V, PVCC2 = 5.0 V ±0.5 V,

CC = 5.0 V ±0.5 V, AVref = 4.5 V to AVCC, VSS = PLLVSS = AVSS = 0 V,

a = –40°C to 85°C.

When PV

CC1 = 3.3 V ±0.3 V, VCC = PVCC1.

When writing or erasing flash EEPROM, T

a = –40°C to 85°C.

Item

Symbol

Min

Max

Unit

Figures

Address delay time

—

Figure 24.8,

CS delay time 1

CSD1

—

24.9

CS delay time 2

CSD2

—

Read strobe delay time 1

RSD1

—

Read strobe delay time 2

RSD2

—

Read data setup time

RDS

—

Read data hold time

RDH

—

Write strobe delay time 1

WSD1

—

Write strobe delay time 2

WSD2

—

Write data delay time

WDD

—

Write data hold time

WDH

cyc × m

—

WAIT setup time

WTS

—

Figure 24.10

WAIT hold time

WTH

—

Read data access time

ACC

cyc × (n+1.5) – 39

—

Figure 24.8,

Access time from read strobe

cyc × (n+1.0) – 39

—

24.9

Write address setup time

—

Write address hold time

—

n: Number of waits

m = 1: CS assertion extension cycle

m = 0: Ordinary cycle (CS assertion non-extension cycle)

[Operating precautions]

The operation guaranteed voltage range of power supply PV

CC1 in MCU expansion mode is 3.3 V

±0.3 V. Do not use a voltage outside this range.

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