SH7052 datasheet(857/919 Pages) RENESAS

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24.3.5

Advanced Timer Unit Timing and Advance Pulse Controller Timing

Table 24.10 shows advanced timer unit timing and advanced pulse controller timing.

Table 24.10 Advanced Timer Unit Timing and Advanced Pulse Controller Timing

Conditions: V

CC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V,

CC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V, AVref = 4.5 V to AVCC,

SS = PLLVSS = AVSS = 0 V, Ta = –40°C to 85°C.

When PV

CC1 = 3.3 V ±0.3 V, VCC = PVCC1.

When writing or erasing flash EEPROM, T

a = –40°C to 85°C.

Item

Symbol

Min

Max

Unit

Figures

Output compare output delay time

TOCD

—

100

Figure 24.11

Input capture input setup time

TICS

24*

24 + t

cyc

—

PULS output delay time

PLSD

—

100

Timer clock input setup time

TCKS

24*

24 + t

cyc

—

Figure 24.12

Timer clock pulse width (single edge

specified)

TCKWH/L

3.0

—

cyc

Timer clock pulse width (both edges

specified)

TCKWH/L

5.0

—

cyc

[Operating precautions]

*1 The timer input signals and timer clock input signals are asynchronous, but judged to have

been changed at clock rise with two-state intervals shown in figures 24.11 and 24.12. If the

setup times shown here are not provided, recognition is delayed until the clock rise two states

after that timing.

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