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SH7052 Datasheet(PDF) 230 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 230 Page - Renesas Technology Corp |
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230 / 919 page ![]() 204 10.2 Register Descriptions 10.2.1 Timer Start Registers (TSTR) The timer start registers (TSTR) are 8-bit registers. The ATU-II has three TSTR registers. Channel Abbreviation Function 0, 1, 2, 3, 4, 5, 10 TSTR1 Free-running counter operation/stop setting 6, 7 TSTR2 11 TSTR3 Timer Start Register 1 (TSTR1) Bit: 7 6 5 4 3 2 1 0 STR10 STR5 STR4 STR3 STR1B, 2B STR2A STR1A STR0 Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W TSTR1 is an 8-bit readable/writable register that starts and stops the free-running counter (TCNT) in channels 0 to 5 and 10. TSTR1 is initialized to H'00 by a power-on reset, and in hardware standby mode and software standby mode. • Bit 7—Counter Start 10 (STR10): Starts and stops channel 10 counters (TCNT10A, 10C, 10D, 10E, 10F, and 10G). TCNT10B and 10H are not stopped. Bit 7: STR10 Description 0 TCNT10 is halted (Initial value) 1 TCNT10 counts • Bit 6—Counter Start 5 (STR5): Starts and stops free-running counter 5 (TCNT5). Bit 6: STR5 Description 0 TCNT5 is halted (Initial value) 1 TCNT5 counts |
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