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SH7052 Datasheet(PDF) 232 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 232 Page - Renesas Technology Corp |
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232 / 919 page ![]() 206 Timer Start Register 2 (TSTR2) Bit: 7 6 5 4 3 2 1 0 STR7D STR7C STR7B STR7A STR6D STR6C STR6B STR6A Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W TSTR2 is an 8-bit readable/writable register that starts and stops the free-running counter (TCNT) in channels 6 and 7. TSTR2 is initialized to H'00 by a power-on reset, and in hardware standby mode and software standby mode. • Bit 7—Counter Start 7D (STR7D): Starts and stops free-running counter 7D (TCNT7D). Bit 7: STR7D Description 0 TCNT7D is halted (Initial value) 1 TCNT7D counts • Bit 6—Counter Start 7C (STR7C): Starts and stops free-running counter 7C (TCNT7C). Bit 6: STR7C Description 0 TCNT7C is halted (Initial value) 1 TCNT7C counts • Bit 5—Counter Start 7B (STR7B): Starts and stops free-running counter 7B (TCNT7B). Bit 5: STR7B Description 0 TCNT7B is halted (Initial value) 1 TCNT7B counts • Bit 4—Counter Start 7A (STR7A): Starts and stops free-running counter 7A (TCNT7A). Bit 4: STR7A Description 0 TCNT7A is halted (Initial value) 1 TCNT7A counts |
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