SH7052 datasheet(236/919 Pages) RENESAS

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Timer Control Registers 1A, 1B, 2A, 2B (TCR1A, TCR1B, TCR2A, TCR2B)

TCR1A, TCR2A

Bit:

76543210

——

CKEGA1

CKEGA0

CKSELA3 CKSELA2 CKSELA1 CKSELA0

Initial value:

00000000

R/W:

R/W

TCR1B, TCR2B

Bit:

76543210

——

CKEGB1

CKEGB0

CKSELB3 CKSELB2 CKSELB1 CKSELB0

Initial value:

00000000

R/W:

R/W

• Bits 7 and 6—Reserved: These bits always read 0. The write value should always be 0.

• Bits 5 and 4—Clock Edge 1 and 0 (CKEGx1, CKEGx0): These bits select the count edge(s)

for external clock TCLKA and TCLKB input.

Bit 5: CKEGx1

Bit 4: CKEGx0

Description

Rising edges counted

(Initial value)

Falling edges counted

Both rising and falling edges counted

Count disabled

x = A or B

• Bits 3 to 0—Clock Select A3 to A0, B3 to B0 (CKSELA3 to CKSELA0, CKSELB3 to

CKSELB0): These bits select whether an internal clock or external clock is used.

When an internal clock is selected, scaled clock

φ" is selected from φ', φ'/2, φ'/4, φ'/8, φ'/16, and

φ'/32.

When an external clock is selected, TCLKA, TCLKB, TI10 pin input, or a TI10 pin input

multiplied clock is selected.

When TI10 pin input and TI10 pin input clock multiplication are selected, set CKEG1 and

CKEG0 in TCR10 so that TI10 input is possible.

SH7052 Datasheet(PDF) 236 Page - Renesas Technology Corp

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