SH7052 datasheet(237/919 Pages) RENESAS

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211

Bit 3:

CKSELx3

Bit 2:

CKSELx2

Bit 1:

CKSELx1

Bit 0:

CKSELx0

Description

0000

Internal clock

φ": counting on φ'

(Initial value)

Internal clock

φ": counting on φ'/2

Internal clock

φ": counting on φ'/4

Internal clock

φ": counting on φ'/8

Internal clock

φ": counting on φ'/16

Internal clock

φ": counting on φ'/32

External clock: counting on TCLKA pin input

External clock: counting on TCLKB pin input

1000

Counting on TI10 pin input (AGCK)

Counting on multiplied (corrected)(AGCKM) TI10

pin input clock

Setting prohibited

x = A or B

*: Don’t care

Timer Control Registers 3 to 5 (TCR3, TCR4, TCR5)

Bit:

——

CKEG1

CKEG0 CKSEL3 CKSEL2 CKSEL1 CKSEL0

Initial value:

R/W:

R/W

• Bits 7 and 6—Reserved: These bits always read 0. The write value should always be 0.

• Bits 5 and 4—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select the count edge(s) for

external clock TCLKA and TCLKB input.

Bit 5: CKEG1

Bit 4: CKEG0

Description

Rising edges counted

(Initial value)

Falling edges counted

Both rising and falling edges counted

Count disabled

SH7052 Datasheet(PDF) 237 Page - Renesas Technology Corp

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