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SH7052 Datasheet(PDF) 240 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 240 Page - Renesas Technology Corp |
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240 / 919 page  214 • Bits 2 to 0—Clock Select A2 to A0, C2 to C0 (CKSELA2 to CKSELA0, CKSELC2 to CKSELC0): These bits select clock φ", scaled from the internal clock source, from φ', φ'/2, φ'/4, φ'/8, φ'/16, and φ'/32. Bit 2: CKSELx2 Bit 1 CKSELx1 Bit 0 CKSELx0 Description 0 0 0 Internal clock φ": counting on φ' (Initial value) 1 Internal clock φ": counting on φ'/2 1 0 Internal clock φ": counting on φ'/4 1 Internal clock φ": counting on φ'/8 1 0 0 Internal clock φ": counting on φ'/16 1 Internal clock φ": counting on φ'/32 1 0 Setting prohibited 1 Setting prohibited x = A or C Timer Control Register 8 (TCR8) Bit: 76543210 — CKSELB2 CKSELB1 CKSELB0 — CKSELA2 CKSELA1 CKSELA0 Initial value: 00000000 R/W: R R/W R/W R/W R R/W R/W R/W The CKSELAx bits relate to DCNT8A to DCNT8H, and the CKSELBx bits relate to DCNT8I to DCNT8P. • Bit 7—Reserved: This bit always reads 0. The write value should always be 0. |
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